References

[1] Behzad Razavi. 2000. Design of Analog CMOS Integrated Circuits (1st. ed.). McGraw-Hill, Inc., USA.
[2] M. Vohrmann, S. Chatterjee, S. Lütkemeier, T. Jungeblut, M. Porrmann and U. Rückert, “A 65 nm standard cell library for ultra low-power applications,” 2015 European Conference on Circuit Theory and Design (ECCTD), 2015, pp. 1-4, doi: 10.1109/ECCTD.2015.7300041.
[3] R. N. Wuerdig, V. G. Lima, F. Baumgratz, R. Soares and S. Bampi, “Evaluating Cell Library Sizing Methodologies for Ultra-Low Power Near-Threshold Operation in Bulk CMOS,” 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS), 2020, pp. 1-4, doi: 10.1109/LASCAS45839.2020.9069031.